LSC-20 Model I: Repeated Addition Program

Model I LSC-20[cite: 1]

Vertical 8-Bit Byte Memory Model (Columns 0 to 19)[cite: 1, 2]

POWER ON[cite: 1] RUN[cite: 1] STOP[cite: 1] ERROR[cite: 1]

Variants / Flags (R-to-L: Bit 0=Low [1], Bit 1=Equal [2], Bit 2=High [4]):[cite: 1, 2]

Instruction Address Pointer (PC = 0, R-to-L):[cite: 1, 2]

OpCode (1=ADD, 5=CMP, 4=ALTER, STOP: Bits 0 & 3 Red)

Address / Data Bit

Flag Test Indicator (Col 11, Bit 0 = 1 Low)

0 (Clear)